Semiconductor devices use the conductive properties of semiconductor materials. Such semiconductor materials may include, for example, silicon (Si) or silicon-containing materials, germanium, or materials including gallium nitride (GaN).
In particular, gallium nitride (GaN) semiconductor devices are increasingly desirable for power semiconductor devices because of their ability to carry large current and support high voltages. Development of these devices has generally been aimed at high power/high frequency applications. Devices fabricated for these types of applications are based on general device structures that exhibit high electron mobility and are referred to variously as heterojunction field effect transistors (HFET), high electron mobility transistors (HEMT), or modulation doped field effect transistors (MODFET). These types of devices can typically withstand high voltages, e.g., 100 Volts, while operating at high frequencies, e.g., 0.1-100 GHz.
One example of a GaN HEMT device includes a nitride semiconductor with at least two nitride layers. Different materials formed on the semiconductor or on a buffer layer causes the layers to have different band gaps. The different material in the adjacent nitride layers also causes polarization, which contributes to a conductive two dimensional electron gas (2DEG) region near the junction of the two layers, specifically in the layer with the narrower band gap.
In a GaN semiconductor device, the nitride layers that cause polarization typically include a barrier layer of AlGaN adjacent to a layer of GaN to include the 2DEG, which allows charge to flow through the device. This barrier layer may be doped or undoped. Because of the 2DEG region existing under the gate at zero gate bias, most nitride devices are normally on, or depletion mode devices. If the 2DEG region is depleted, i.e. removed, below the gate at zero applied gate bias, the device can be an enhancement mode device. Enhancement mode devices are normally off and are desirable because of the added safety they provide. An enhancement mode device requires a positive bias applied at the gate in order to conduct current. Examples of GaN semiconductor devices can be found in commonly assigned U.S. Patent Application Publication Nos. 2010/0258912 and 2010/0258843, both of which are incorporated by reference in their entirety.
FIG. 1 illustrates a cross-sectional view of one example of an enhancement mode GaN transistor device 100 with a self-aligned gate structure. Commonly assigned U.S. Patent Application Publication No. 2010/0258843 discloses a process for forming such a device. In FIG. 1, device 100 includes substrate 101, which may be either sapphire, SiC, or silicon, transition layers 102, un-doped GaN material 103, un-doped AlGaN barrier material 104, drain ohmic contact metal 110, source ohmic contact metal 111, a doped p-type AlGaN or p-type GaN layer formed into a doped epitaxial gate 113, and gate metal 112 formed over the doped epitaxial gate 113. A layer of dielectric material 105, such as silicon nitride, covers the barrier material 104, such that a portion 114 of the dielectric material covers gate 113.
During formation of the gate structure for device 100, the top p-type AlGaN or GaN layer may be implanted, diffused, or grown with a dopant such as magnesium (Mg), and then a metal layer composed of, for example, titanium nitride (TiN) is deposited on top of the doped GaN. Photolithography may be used to define the desired boundaries of the gate, and the metal layer is then etched away according to the desired boundaries. The etched metal gate material may then be used as an etch mask to create a self-aligned gate structure including the gate metal 112 and the doped epitaxial gate 113, with the doped epitaxial gate 113 including sidewalls 120 defined by the gate metal 112.
One undesirable feature of the structure shown in FIG. 1 is that, when removing the Mg-doped epitaxial GaN material external to that portion that is used for the gate, a very sensitive etch is required to avoid interfering with the underlying barrier layer. Another undesirable feature in conventional transistors is that electrical current can flow down the sidewalls 120 of the doped epitaxial gate 113. Further, while reducing the thickness of the doped epitaxial gate 113 can produce a more desirable device transconductance, it can also increase the leakage current along the gate sidewalls 120. This can decrease efficiency and increase power losses, particularly when compared to silicon transistors. Furthermore, the interface between the SiN material 105 and the sidewalls 120 may tend to rupture. This limits the maximum voltage that can be applied to the gate without destroying the device.
Accordingly, it is desirable to achieve improved gate structures for GaN and other transistor devices, and methods of forming these gate structures.